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1
physical design engineer
- Physical design knowledge, from netlist handoff to GDS tape out including floor planning, place and route, clock tree synthesis, timing closure , IR closure and physical verification.
- Worked on latest technology designs (12nm , 7nm)
- Physical verification (DRC /LVS and other checks)
- Working knowledge on deep sub micron issues
- Works on ICC2 , encounter , primetime
- Good scripting skills (perl , tcl and C)
- UNIX working environment
2
physical design engineer
- 1.6 Years of experience in VLSI Physical Design in latest technologies of 10nm and 28 nm with multi million gate design tap outs in Intel.
- Hands on Experience in Physical Design flow from Netlist to GDSII.
- Good understanding and knowledge on all aspects of backend ASIC design flow like Floorplanning/Power-planning,Timing closure,signal integrity Analysis,Static IR Drop Analysis,FEV,Design Planning(DP),and Physical Verification.
- Effective communicator with good multi tasking ability
3
physical design engineer
- Hardware Design with system and algorithm design in Simulink and MATLAB used to implement ASIC Hardware.
- Model hardware architecture at the system level and generating code using Simulink Code generate.
- Creating new web services using Matlab and other programming languages to support integration with other development systems.
- Designed and developed the automated trading software for Back testing historical trading data in java platform.
- Worked in a team from scratching to the development of such trading software.
4
physical design engineer
- Tool : Innovus
- Gate Count : 1000k
- Macros : 14
- No. of Clocks : 2
- Clock Frequency : 588 Mhz
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