Asic Design Engineer Resume Examples

senior asic design engineer

  • NAMI Video CODEC : Micro-architected and designed multi clock domain Host-DMA interface, IR interface, key frames and accumulation update frame generation block in encoder, bit plane statistics computation and several blocks for wavelet transform and arithmetic encoder blocks. 
  • Reed-Solomon FEC IP: Micro-architected and designed the Euclid algorithm block in RS decoder. Wrote the complete RS FEC encoder and decoder golden reference model in ā€˜Cā€™. Implemented Galois field polynomial arithmetic routines, encoder, syndrome, Euclid, Chien search and error correction routines. 
  • Wireless NIC/Base band processor: Micro-architected and designed DMA control block for Whitecap protocol based Radio MAC. Designed memory interface module for 802.11b core. Wrote full chip tests in ā€˜Cā€™ for Radio MAC verification. Wrote test benches for MAC and baseband co-simulation. Prototyped 802.11a MAC using Xilinx FPGA. 
  • Generated BIST for all memories. Generated test vectors for on chip interfaces. Completed design changes to support higher rates for 802.11a/g PHY and defined the architecture for 802.11e/i MAC.

asic design engineer

  • Designed complex logic blocks for next generation fabric chips.
  • Worked with chip architect to finalise block level specifications.
  • Designed microarchitecture to meet throughput with area and power optimization.
  • Defined block interfaces and register sets as part of block design.
  • Wrote RTL to implement the microarchitecture and worked with DV team to develop test cases, debug and perform block level bringup.
  • Implemented dwrr scheduling scheme for fabric load balancing.
  • Performed full chip RTL integration.

asic design engineer

  • Designed synthesizable traffic generator for FPGA prototyping of fabric chip.
  • Good knowledge of lint checking, CDC and STA.
  • Good knowledge of low power design techniques i.e, clock gating, power gating and DVFS.
  • Familiar with computer architecture and cache coherency.