asic engineer

• Design Engineer in Memory Sub System Team.
• Automated Synthesis flow to generate the reports in a readable format (which is currently being used in parallel teams).
• Worked on writing assertions for Interface Protocols.

asic engineer

• Verification Engineer in Memory Sub System Team(MSS) for Tegra(Domain – Self Driving automobiles).
• Owner for Verification of a sub unit Testbench in MSS team.
• Point of Contact for any collaboration with Formal Verification Team.
• Responsible for Build Time and run time optimizations and ensure that it doesn’t cross the threshold time for compilation.